Tim Schneider

Hi, I'm Tim Schneider. I am an Electronics Engineer with strong interests in Electronic Design Automation (EDA) Specifically in the areas of Simulation and Verification. Other interests include: Photography, Mountain Biking, Rock Climbing, Skiing, Outdoors Adventuring, Music (Pianist). As an avid 'technologist', I love learning how things work, and sharing this knowledge with others.

Tim Schneider is an Applications Engineer for a leading EDA Software firm. Working in partnership with customers to use Synopsys software for ASIC, FPGA and system on chip (SOC) design. A 'lifetime learner', he thrives on solving challenging problems and contributing to customers success.  Tim Schneider specializes in IC and ASIC Design Verification. Project Management, Pre/Post Sales Support, Training. System Verilog, VHDL, Verilog, SystemC, C/C++ UNIX, Perl. Verification tools, coverage planning and methodologies. VCS, VMM, OVM, UVM. Tim Schneider is a Photographer, Musician (Pianist), Outdoors recreation enthusiast (cycling, skiing, rock climbing) Tim Schneider has deep knowledge of OSX. Final Cut, Photoshop/Lightroom and other applications.  

Electronics Engineer at Honeywell

May 1994 - June 1995

Provided support for hardware designers using Mentor Graphics EDA tools. UNIX system administration and support. Tape out support for multiple ASICs netlist verification and simulation. Migration of users from HP/Apollo to HPUX workstations. User Training. Supported cpld and fpga designs using Minc partitioning software. ABEL/PALASM, etc: Supported Synopsys Logic Modeling software and Synopsys synthesis tools

Electronics Engineer at Honeywell

January 1990 - June 1994

Supported full line of Mentor Graphics software for board design and simulation. Custom library development, writing behavioural simulation models. Integrated FPGA design tools with existing flows using UNIX scripting and "C" coding. Developed/built custom hardware models for various devices. Supported LM-1200 for 26 unique project teams during the Boeing 777 avionics project

Electronics Engineer at Boeing Military Airplanes

June 1988 - December 1990

EDA Support Engineer: Supported hardware/software, Mentor Graphics IDEA station Developed custom analog modeling software (in C) to manage libraries of discrete and Analog IC models. C software specification design and development for front end integration of electronic design database file to a backend IBM RDMS archival system Day to day support of user community of over 350 Apollo workstations. Software installation, system administration e Embedded Software Developer: Integrated VRTX RTOS with the rest of the target sighting system, using 68020 based hardware. Setup configuration management system. Coding in C and integration with HPUX and HP emulation platform.

Engineering Co-Op / Intern at Raytheon Missile Systems

1987 - 1987

Sr. Staff Applications Consultant at Synopsys Inc.

June 1995

Sr. Applications Engineer: Verification Specialist supporting Synopsys tools and methodology using Synopsys digital logic simulator VCS. (Verilog Compiled Simulator) Verification planning, project management, tool development, training and deployment. System Verilog, UVM, Low Power, UPF, VHDL, SystemC, Verilog. Field support, Seminars, Customer training, pre/postsales presentations, demonstrations. Customers include: Intel, Freescale, Texas Instruments, Qualcomm, Boeing, Broadcom, National Semiconductor, General Dynamics, Microchip, Honeywell, Motorola, Fujitsu, ITT and others. Past roles included Applications Engineering support for Logic Modeling Systems Hardware Modelers, Telecom Workbench, Source Models, SmartModels, Arkos Hardware Emulation / Acceleration, VSS, Cyclone, and Formal Equivalence checking. Participated in rollout and first customer support of Formality prior to product introduction.

Wichita State University

1984 – 1988

BSEE

Photography, Cycling, Mountain Biking, Rock Climbing, Skiing, Outdoors Adventuring, Music, and Computer Programming, Craftsman and General Technologist